1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_DAC_H_
10 #define _FSL_DAC_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup dac
16 * @{
17 */
18
19 /*! @file */
20
21 /*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24
25 /*! @name Driver version */
26 /*@{*/
27 /*! @brief DAC driver version 2.0.0. */
28 #define FSL_DAC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
29 /*@}*/
30
31 /*!
32 * @brief DAC reset control.
33 */
34 enum _dac_reset_control
35 {
36 kDAC_ResetFIFO = LPDAC_RCR_FIFORST_MASK, /*!< Resets the FIFO pointers and flags. */
37 kDAC_ResetLogic = LPDAC_RCR_SWRST_MASK, /*!< Resets all DAC registers and internal logic. */
38 };
39
40 /*!
41 * @brief DAC interrupts.
42 */
43 enum _dac_interrupt_enable
44 {
45 kDAC_FIFOFullInterruptEnable = LPDAC_IER_FULL_IE_MASK, /*!< FIFO full interrupt enable. */
46 kDAC_FIFOEmptyInterruptEnable = LPDAC_IER_EMPTY_IE_MASK, /*!< FIFO empty interrupt enable. */
47 kDAC_FIFOWatermarkInterruptEnable = LPDAC_IER_WM_IE_MASK, /*!< FIFO watermark interrupt enable. */
48 kDAC_SwingBackInterruptEnable = LPDAC_IER_SWBK_IE_MASK, /*!< Swing back one cycle complete interrupt enable. */
49 kDAC_FIFOOverflowInterruptEnable = LPDAC_IER_OF_IE_MASK, /*!< FIFO overflow interrupt enable. */
50 kDAC_FIFOUnderflowInterruptEnable = LPDAC_IER_UF_IE_MASK, /*!< FIFO underflow interrupt enable. */
51 };
52
53 /*!
54 * @brief DAC DMA switchers.
55 */
56 enum _dac_dma_enable
57 {
58 kDAC_FIFOEmptyDMAEnable = LPDAC_DER_EMPTY_DMAEN_MASK, /*!< FIFO empty DMA enable. */
59 kDAC_FIFOWatermarkDMAEnable = LPDAC_DER_WM_DMAEN_MASK, /*!< FIFO watermark DMA enable. */
60 };
61
62 /*!
63 * @brief DAC status flags.
64 */
65 enum _dac_status_flags
66 {
67 kDAC_FIFOUnderflowFlag = LPDAC_FSR_UF_MASK, /*!< This flag means that there is a new trigger after the buffer is
68 empty. The FIFO read pointer will not
69 increase in this case and the data sent to DAC analog conversion will not changed. This flag is cleared by writing a 1
70 to it. */
71
72 kDAC_FIFOOverflowFlag = LPDAC_FSR_OF_MASK, /*!< This flag indicates that data is intended to write into FIFO after the
73 buffer is full. The writer pointer will
74 not increase in this case. The extra data will not be written into the FIFO. This flag is cleared by writing a 1 to it.
75 */
76
77 kDAC_FIFOSwingBackFlag = LPDAC_FSR_SWBK_MASK, /*!< This flag indicates that the DAC has completed one period of
78 conversion in swing back mode. It means
79 that the read pointer has increased to the top (write pointer) once and then decreased to zero once. For
80 example, after three data is written to FIFO, the writer pointer is now 3. Then, if continually triggered, the
81 read pointer will swing like: 0-1-2-1-0-1-2-, and so on. After the fourth trigger, the flag is set. This flag is
82 cleared by writing a 1 to it. */
83
84 kDAC_FIFOWatermarkFlag = LPDAC_FSR_WM_MASK, /*!< This field is set if the remaining data in FIFO is less than or equal
85 to the setting value of wartermark. By writing data into
86 FIFO by DMA or CPU, this flag is cleared automatically when the data in FIFO is more than the setting value of
87 watermark. */
88
89 kDAC_FIFOEmptyFlag = LPDAC_FSR_EMPTY_MASK, /*!< FIFO empty flag. */
90 kDAC_FIFOFullFlag = LPDAC_FSR_FULL_MASK, /*!< FIFO full flag. */
91 };
92
93 /*!
94 * @brief DAC FIFO trigger mode.
95 */
96 typedef enum _dac_fifo_trigger_mode
97 {
98 kDAC_FIFOTriggerByHardwareMode = 0U, /*!< Buffer would be triggered by hardware. */
99 kDAC_FIFOTriggerBySoftwareMode = 1U, /*!< Buffer would be triggered by software. */
100 } dac_fifo_trigger_mode_t;
101
102 /*!
103 * @brief DAC FIFO work mode.
104 */
105 typedef enum _dac_fifo_work_mode
106 {
107 kDAC_FIFODisabled = 0U, /*!< FIFO mode is disabled and buffer mode is enabled. Any data written to DATA[DATA] goes
108 to buffer then goes to conversion. */
109 kDAC_FIFOWorkAsNormalMode = 1U, /*!< FIFO mode is enabled. Data will be first read from FIFO to buffer then goes to
110 conversion. */
111 kDAC_FIFOWorkAsSwingMode = 2U, /*!< In swing mode, the read pointer swings between the writer pointer and zero. That
112 is, the trigger increases the read pointer till reach the writer pointer and
113 decreases the read pointer till zero, and so on. The FIFO empty/full/watermark
114 flag will not update during swing back mode. */
115 } dac_fifo_work_mode_t;
116
117 /*!
118 * @brief DAC reference voltage source.
119 */
120 typedef enum _dac_reference_voltage_source
121 {
122 kDAC_ReferenceVoltageSourceAlt1 = 0U, /*!< The DAC selects VREFH_INT as the reference voltage. */
123 kDAC_ReferenceVoltageSourceAlt2 = 1U, /*!< The DAC selects VREFH_EXT as the reference voltage. */
124 } dac_reference_voltage_source_t;
125
126 /*!
127 * @brief DAC configuration structure.
128 */
129 typedef struct _dac_config
130 {
131 uint32_t fifoWatermarkLevel; /*!< FIFO's watermark, the max value can be the hardware FIFO size. */
132 dac_fifo_trigger_mode_t fifoTriggerMode; /*!< Select the trigger mode for FIFO. */
133 dac_fifo_work_mode_t fifoWorkMode; /*!< Select the work mode for FIFO. */
134 bool enableLowPowerMode; /*!< Enable the low power mode. */
135 dac_reference_voltage_source_t referenceVoltageSource; /*!< Select the reference voltage source. */
136 } dac_config_t;
137
138 /*******************************************************************************
139 * API
140 ******************************************************************************/
141 #if defined(__cplusplus)
142 extern "C" {
143 #endif
144
145 /*!
146 * @name Initialization and de-initialization
147 * @{
148 */
149
150 /*!
151 * @brief Initialize the DAC module with common configuartion.
152 *
153 * The clock will be enabled in this function.
154 *
155 * @param base DAC peripheral base address.
156 * @param config Pointer to configuration structure.
157 */
158 void DAC_Init(LPDAC_Type *base, const dac_config_t *config);
159
160 /*!
161 * @brief Get the default settings for initialization's configuration.
162 *
163 * This function initializes the user configuration structure to a default value. The default values are:
164 * @code
165 * config->fifoWatermarkLevel = 0U;
166 * config->fifoTriggerMode = kDAC_FIFOTriggerByHardwareMode;
167 * config->fifoWorkMode = kDAC_FIFODisabled;
168 * config->enableLowPowerMode = false;
169 * config->referenceVoltageSource = kDAC_ReferenceVoltageSourceAlt1;
170 * @endcode
171 *
172 * @param config Pointer to configuration structure.
173 * @param
174 */
175 void DAC_GetDefaultConfig(dac_config_t *config);
176
177 /*!
178 * @brief De-initialize the DAC module.
179 *
180 * The clock will be disabled in this function.
181 *
182 * @param base DAC peripheral base address.
183 * @param
184 */
185 void DAC_Deinit(LPDAC_Type *base);
186
187 /*!
188 * @brief Assert the reset control to part hardware.
189 *
190 * This fucntion is to assert the reset control to part hardware. Responding part hardware would remain reset untill
191 * cleared by software.
192 *
193 * @param base DAC peripheral base address.
194 * @param mask The reset control mask, see to #_dac_reset_control_t.
195 */
DAC_SetReset(LPDAC_Type * base,uint32_t mask)196 static inline void DAC_SetReset(LPDAC_Type *base, uint32_t mask)
197 {
198 base->RCR |= mask;
199 }
200
201 /*!
202 * @brief Clear the reset control to part hardware.
203 *
204 * This fucntion is to clear the reset control to part hardware. Responding part hardware would work after the reset
205 * control is cleared by software.
206 *
207 * @param base DAC peripheral base address.
208 * @param mask The reset control mask, see to #_dac_reset_control_t.
209 */
DAC_ClearReset(LPDAC_Type * base,uint32_t mask)210 static inline void DAC_ClearReset(LPDAC_Type *base, uint32_t mask)
211 {
212 base->RCR &= ~mask;
213 }
214
215 /*!
216 * @brief Enable the DAC hardware system or not.
217 *
218 * This function is to start the Programmable Reference Generator operation or not.
219 *
220 * @param base DAC peripheral base address.
221 * @param enable Assertion of indicated event.
222 */
DAC_Enable(LPDAC_Type * base,bool enable)223 static inline void DAC_Enable(LPDAC_Type *base, bool enable)
224 {
225 if (enable)
226 {
227 base->GCR |= LPDAC_GCR_DACEN_MASK;
228 }
229 else
230 {
231 base->GCR &= ~LPDAC_GCR_DACEN_MASK;
232 }
233 }
234
235 /* @} */
236
237 /*!
238 * @name Interrupts
239 * @{
240 */
241
242 /*!
243 * @brief Enable the interrupts.
244 *
245 * @param base DAC peripheral base address.
246 * @param mask Mask value of indicated interrupt events. See to #_dac_interrupt_enable.
247 */
DAC_EnableInterrupts(LPDAC_Type * base,uint32_t mask)248 static inline void DAC_EnableInterrupts(LPDAC_Type *base, uint32_t mask)
249 {
250 base->IER |= mask;
251 }
252
253 /*!
254 * @brief Disable the interrupts.
255 *
256 * @param base DAC peripheral base address.
257 * @param mask Mask value of indicated interrupt events. See to #_dac_interrupt_enable.
258 */
DAC_DisableInterrupts(LPDAC_Type * base,uint32_t mask)259 static inline void DAC_DisableInterrupts(LPDAC_Type *base, uint32_t mask)
260 {
261 base->IER &= ~mask;
262 }
263
264 /* @} */
265
266 /*!
267 * @name DMA control
268 * @{
269 */
270
271 /*!
272 * @brief Enable the DMA switchers or not.
273 *
274 * @param base DAC peripheral base address.
275 * @param mask Mask value of indicated DMA requeset. See to #_dac_dma_enable.
276 * @param enable Enable the DMA or not.
277 */
DAC_EnableDMA(LPDAC_Type * base,uint32_t mask,bool enable)278 static inline void DAC_EnableDMA(LPDAC_Type *base, uint32_t mask, bool enable)
279 {
280 if (enable)
281 {
282 base->DER |= mask;
283 }
284 else
285 {
286 base->DER &= ~mask;
287 }
288 }
289
290 /* @} */
291
292 /*!
293 * @name Status flags
294 * @{
295 */
296
297 /*!
298 * @brief Get status flags of DAC module.
299 *
300 * @param base DAC peripheral base address.
301 * @return Mask value of status flags. See to #_dac_status_flags.
302 */
DAC_GetStatusFlags(LPDAC_Type * base)303 static inline uint32_t DAC_GetStatusFlags(LPDAC_Type *base)
304 {
305 return base->FSR;
306 }
307
308 /*!
309 * @brief Clear status flags of DAC module.
310 *
311 * @param base DAC peripheral base address.
312 * @param flags Mask value of status flags to be cleared. See to #_dac_status_flags.
313 */
DAC_ClearStatusFlags(LPDAC_Type * base,uint32_t flags)314 static inline void DAC_ClearStatusFlags(LPDAC_Type *base, uint32_t flags)
315 {
316 base->FSR = flags;
317 }
318
319 /* @} */
320
321 /*!
322 * @name Functional feature
323 * @{
324 */
325
326 /*!
327 * @brief Set data into the entry of FIFO buffer.
328 *
329 * @param base DAC peripheral base address.
330 * @param value Setting value into FIFO buffer.
331 */
DAC_SetData(LPDAC_Type * base,uint32_t value)332 static inline void DAC_SetData(LPDAC_Type *base, uint32_t value)
333 {
334 base->DATA = LPDAC_DATA_DATA(value);
335 }
336
337 /*!
338 * @brief Get the value of the FIFO write pointer.
339 *
340 * @param base DAC peripheral base address.
341 * @return Current value of the FIFO write pointer.
342 */
343
DAC_GetFIFOWritePointer(LPDAC_Type * base)344 static inline uint32_t DAC_GetFIFOWritePointer(LPDAC_Type *base)
345 {
346 return (LPDAC_FPR_FIFO_WPT_MASK & base->FPR) >> LPDAC_FPR_FIFO_WPT_SHIFT;
347 }
348
349 /*!
350 * @brief Get the value of the FIFO read pointer.
351 *
352 * @param base DAC peripheral base address.
353 * @return Current value of the FIFO read pointer.
354 */
355
DAC_GetFIFOReadPointer(LPDAC_Type * base)356 static inline uint32_t DAC_GetFIFOReadPointer(LPDAC_Type *base)
357 {
358 return (LPDAC_FPR_FIFO_RPT_MASK & base->FPR) >> LPDAC_FPR_FIFO_RPT_SHIFT;
359 }
360
361 /*!
362 * @brief Do software trigger to FIFO when in software mode.
363 *
364 * @param base DAC peripheral base address.
365 */
366
DAC_DoSoftwareTriggerFIFO(LPDAC_Type * base)367 static inline void DAC_DoSoftwareTriggerFIFO(LPDAC_Type *base)
368 {
369 base->TCR = LPDAC_TCR_SWTRG_MASK;
370 }
371
372 /* @} */
373
374 #if defined(__cplusplus)
375 }
376 #endif
377
378 /*!
379 * @}
380 */
381 #endif /* _FSL_DAC12_H_ */
382
