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Searched refs:ZLL_SAM_TABLE_SAM_INDEX_WR_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h32460 #define ZLL_SAM_TABLE_SAM_INDEX_WR_MASK (0x80U) macro
32462 …(uint32_t)(((uint32_t)(x)) << ZLL_SAM_TABLE_SAM_INDEX_WR_SHIFT)) & ZLL_SAM_TABLE_SAM_INDEX_WR_MASK)
DRV32M1_zero_riscy.h32294 #define ZLL_SAM_TABLE_SAM_INDEX_WR_MASK (0x80U) macro
32296 …(uint32_t)(((uint32_t)(x)) << ZLL_SAM_TABLE_SAM_INDEX_WR_SHIFT)) & ZLL_SAM_TABLE_SAM_INDEX_WR_MASK)