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Searched refs:ZLL_PHY_CTRL_TC2PRIME_EN_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h31999 #define ZLL_PHY_CTRL_TC2PRIME_EN_MASK (0x1000000U) macro
32005 … (((uint32_t)(((uint32_t)(x)) << ZLL_PHY_CTRL_TC2PRIME_EN_SHIFT)) & ZLL_PHY_CTRL_TC2PRIME_EN_MASK)
DRV32M1_zero_riscy.h31833 #define ZLL_PHY_CTRL_TC2PRIME_EN_MASK (0x1000000U) macro
31839 … (((uint32_t)(((uint32_t)(x)) << ZLL_PHY_CTRL_TC2PRIME_EN_SHIFT)) & ZLL_PHY_CTRL_TC2PRIME_EN_MASK)