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Searched refs:XRDC_HWCFG0_NDID_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_xrdc.c117 config->domainNumber = ((base->HWCFG0 & XRDC_HWCFG0_NDID_MASK) >> XRDC_HWCFG0_NDID_SHIFT) + 1U; in XRDC_GetHardwareConfig()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h23338 #define XRDC_HWCFG0_NDID_MASK (0xFFU) macro
23340 … (((uint32_t)(((uint32_t)(x)) << XRDC_HWCFG0_NDID_SHIFT)) & XRDC_HWCFG0_NDID_MASK)
DRV32M1_zero_riscy.h30870 #define XRDC_HWCFG0_NDID_MASK (0xFFU) macro
30872 … (((uint32_t)(((uint32_t)(x)) << XRDC_HWCFG0_NDID_SHIFT)) & XRDC_HWCFG0_NDID_MASK)