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Searched refs:XRDC_HWCFG0_MID_SHIFT (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h23351 #define XRDC_HWCFG0_MID_SHIFT (28U) macro
23352 …CFG0_MID(x) (((uint32_t)(((uint32_t)(x)) << XRDC_HWCFG0_MID_SHIFT)) & XRDC_H…
DRV32M1_zero_riscy.h30883 #define XRDC_HWCFG0_MID_SHIFT (28U) macro
30884 …CFG0_MID(x) (((uint32_t)(((uint32_t)(x)) << XRDC_HWCFG0_MID_SHIFT)) & XRDC_H…