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Searched refs:XCVR_WOR_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h31405 #define XCVR_WOR_BASE (0x410304C0u) macro
31407 #define XCVR_WOR ((XCVR_WOR_Type *)XCVR_WOR_BASE)
31409 #define XCVR_WOR_BASE_ADDRS { XCVR_WOR_BASE }
DRV32M1_zero_riscy.h30536 #define XCVR_WOR_BASE (0x410304C0u) macro
30538 #define XCVR_WOR ((XCVR_WOR_Type *)XCVR_WOR_BASE)
30540 #define XCVR_WOR_BASE_ADDRS { XCVR_WOR_BASE }