Home
last modified time | relevance | path

Searched refs:XCVR_TX_DIG_CTRL_LFSR_EN_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/middleware/wireless/framework/XCVR/RV32M1/
Dfsl_xcvr.c1938 …VR_TX_DIG_CTRL_DFT_CLK_SEL_MASK | XCVR_TX_DIG_CTRL_TX_DFT_EN_MASK | XCVR_TX_DIG_CTRL_LFSR_EN_MASK); in XCVR_DftTxPatternReg()
2021 XCVR_TX_DIG_CTRL_LFSR_EN_MASK); in XCVR_DftTxLfsrReg()
2047 XCVR_TX_DIG_CTRL_LFSR_EN_MASK);/* Clear LFSR_EN */ in XCVR_DftTxOff()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h30997 #define XCVR_TX_DIG_CTRL_LFSR_EN_MASK (0x80U) macro
30999 … (((uint32_t)(((uint32_t)(x)) << XCVR_TX_DIG_CTRL_LFSR_EN_SHIFT)) & XCVR_TX_DIG_CTRL_LFSR_EN_MASK)
DRV32M1_zero_riscy.h30128 #define XCVR_TX_DIG_CTRL_LFSR_EN_MASK (0x80U) macro
30130 … (((uint32_t)(((uint32_t)(x)) << XCVR_TX_DIG_CTRL_LFSR_EN_SHIFT)) & XCVR_TX_DIG_CTRL_LFSR_EN_MASK)