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Searched refs:XCVR_TX_DIG_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h31141 #define XCVR_TX_DIG_BASE (0x41030200u) macro
31143 #define XCVR_TX_DIG ((XCVR_TX_DIG_Type *)XCVR_TX_DIG_BASE)
31145 #define XCVR_TX_DIG_BASE_ADDRS { XCVR_TX_DIG_BASE }
DRV32M1_zero_riscy.h30272 #define XCVR_TX_DIG_BASE (0x41030200u) macro
30274 #define XCVR_TX_DIG ((XCVR_TX_DIG_Type *)XCVR_TX_DIG_BASE)
30276 #define XCVR_TX_DIG_BASE_ADDRS { XCVR_TX_DIG_BASE }