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Searched refs:XCVR_TSM_TIMING40_DCOC_EN_RX_HI (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h30011 #define XCVR_TSM_TIMING40_DCOC_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x)) << XCVR_TSM_TIMING40_… macro
DRV32M1_zero_riscy.h29142 #define XCVR_TSM_TIMING40_DCOC_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x)) << XCVR_TSM_TIMING40_… macro