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Searched refs:XCVR_TSM_CTRL_FORCE_RX_EN_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/middleware/wireless/framework/XCVR/RV32M1/
Dfsl_xcvr.c1831 XCVR_TSM->CTRL |= XCVR_TSM_CTRL_FORCE_RX_EN_MASK; in XCVR_ForceRxWu()
1836 XCVR_TSM->CTRL &= ~XCVR_TSM_CTRL_FORCE_RX_EN_MASK; in XCVR_ForceRxWd()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h29274 #define XCVR_TSM_CTRL_FORCE_RX_EN_MASK (0x8U) macro
29280 …(((uint32_t)(((uint32_t)(x)) << XCVR_TSM_CTRL_FORCE_RX_EN_SHIFT)) & XCVR_TSM_CTRL_FORCE_RX_EN_MASK)
DRV32M1_zero_riscy.h28405 #define XCVR_TSM_CTRL_FORCE_RX_EN_MASK (0x8U) macro
28411 …(((uint32_t)(((uint32_t)(x)) << XCVR_TSM_CTRL_FORCE_RX_EN_SHIFT)) & XCVR_TSM_CTRL_FORCE_RX_EN_MASK)