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Searched refs:XCVR_PKT_RAM_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/middleware/wireless/framework/XCVR/RV32M1/
Ddbg_ram_capture.c115 … pkt_ram_ptr0 = (volatile uint8_t *)XCVR_PKT_RAM_BASE; /* address is same for bank 0 or 1 */ in unpack_sequential_data()
162 pkt_ram_ptr0 = (volatile uint8_t *)XCVR_PKT_RAM_BASE; in unpack_simul_data()
163 pkt_ram_ptr1 = (volatile uint8_t *)XCVR_PKT_RAM_BASE; in unpack_simul_data()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h26685 #define XCVR_PKT_RAM_BASE (0x41030700u) macro
26687 #define XCVR_PKT_RAM ((XCVR_PKT_RAM_Type *)XCVR_PKT_RAM_BASE)
26689 #define XCVR_PKT_RAM_BASE_ADDRS { XCVR_PKT_RAM_BASE }
DRV32M1_zero_riscy.h25841 #define XCVR_PKT_RAM_BASE (0x41030700u) macro
25843 #define XCVR_PKT_RAM ((XCVR_PKT_RAM_Type *)XCVR_PKT_RAM_BASE)
25845 #define XCVR_PKT_RAM_BASE_ADDRS { XCVR_PKT_RAM_BASE }