Searched refs:XCVR_PHY_PHY_FSK_MISC_CLK_CTRL (Results 1 – 11 of 11) sorted by relevance
| /hal_openisa-latest/vega_sdk_riscv/middleware/wireless/framework/XCVR/RV32M1/cfgs_rv32m1/ |
| D | fsl_xcvr_ant_config.c | 82 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
107 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_ble_config.c | 72 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_gfsk_bt_0p5_h_1p0_config.c | 69 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_gfsk_bt_0p5_h_0p7_config.c | 69 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_gfsk_bt_0p7_h_0p5_config.c | 70 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_msk_config.c | 70 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_gfsk_bt_0p5_h_0p5_config.c | 70 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_gfsk_bt_0p3_h_0p5_config.c | 71 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| D | fsl_xcvr_gfsk_bt_0p5_h_0p32_config.c | 70 XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(0xF),
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| /hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/ |
| D | RV32M1_ri5cy.h | 26569 #define XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(x) (((uint32_t)(((uint32_t)(x)) << XCVR_PHY_PHY_FSK_M… macro
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| D | RV32M1_zero_riscy.h | 25725 #define XCVR_PHY_PHY_FSK_MISC_CLK_CTRL(x) (((uint32_t)(((uint32_t)(x)) << XCVR_PHY_PHY_FSK_M… macro
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