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Searched refs:XCVR_MISC_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h26383 #define XCVR_MISC_BASE (0x41030280u) macro
26385 #define XCVR_MISC ((XCVR_CTRL_Type *)XCVR_MISC_BASE)
26387 #define XCVR_CTRL_BASE_ADDRS { XCVR_MISC_BASE }
DRV32M1_zero_riscy.h25539 #define XCVR_MISC_BASE (0x41030280u) macro
25541 #define XCVR_MISC ((XCVR_CTRL_Type *)XCVR_MISC_BASE)
25543 #define XCVR_CTRL_BASE_ADDRS { XCVR_MISC_BASE }