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Searched refs:TR (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_mu.c65 base->TR[regIndex] = msg; in MU_SendMsg()
Dfsl_mu.h173 base->TR[regIndex] = msg; in MU_SendMsgNonBlocking()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14042 …__IO uint32_t TR[4]; /**< Transmit Register, array offset: 0x20, array… member
DRV32M1_zero_riscy.h14724 …__IO uint32_t TR[4]; /**< Transmit Register, array offset: 0x20, array… member