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Searched refs:TPM_QDCTRL_QUADMODE_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_tpm.c663 reg &= ~(TPM_QDCTRL_QUADMODE_MASK); in TPM_SetupQuadDecode()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h19693 #define TPM_QDCTRL_QUADMODE_MASK (0x8U) macro
19699 … (((uint32_t)(((uint32_t)(x)) << TPM_QDCTRL_QUADMODE_SHIFT)) & TPM_QDCTRL_QUADMODE_MASK)
DRV32M1_zero_riscy.h20521 #define TPM_QDCTRL_QUADMODE_MASK (0x8U) macro
20527 … (((uint32_t)(((uint32_t)(x)) << TPM_QDCTRL_QUADMODE_SHIFT)) & TPM_QDCTRL_QUADMODE_MASK)