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Searched refs:TPM_POL_POL0_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_tpm.c630 base->POL |= TPM_POL_POL0_MASK; in TPM_SetupQuadDecode()
634 base->POL &= ~TPM_POL_POL0_MASK; in TPM_SetupQuadDecode()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h19604 #define TPM_POL_POL0_MASK (0x1U) macro
19610 … (((uint32_t)(((uint32_t)(x)) << TPM_POL_POL0_SHIFT)) & TPM_POL_POL0_MASK)
DRV32M1_zero_riscy.h20432 #define TPM_POL_POL0_MASK (0x1U) macro
20438 … (((uint32_t)(((uint32_t)(x)) << TPM_POL_POL0_SHIFT)) & TPM_POL_POL0_MASK)