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Searched refs:TMR (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h7391 __IO uint32_t TMR; /**< SAI Transmit Mask Register, offset: 0x60 */ member
DRV32M1_zero_riscy.h7535 __IO uint32_t TMR; /**< SAI Transmit Mask Register, offset: 0x60 */ member