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Searched refs:TIMING18 (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/middleware/wireless/framework/XCVR/RV32M1/
Dfsl_xcvr.c1113 XCVR_TSM->TIMING18 = com_config->tsm_timing_18_init; in XCVR_Configure()
1148 XCVR_TSM->TIMING18 += B1(2); /* (sy_divn_en) */ in XCVR_Configure()
1255 XCVR_TSM->TIMING18 = com_config->tsm_timing_18_init+GFSK_250K_RX_WD_ONLY_ADJUST; in XCVR_Configure()
1324 XCVR_TSM->TIMING18 = com_config->tsm_timing_18_init; in XCVR_Configure()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h29202 __IO uint32_t TIMING18; /**< TSM_TIMING18, offset: 0x78 */ member
DRV32M1_zero_riscy.h28333 __IO uint32_t TIMING18; /**< TSM_TIMING18, offset: 0x78 */ member