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Searched refs:TIMING05 (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/middleware/wireless/framework/XCVR/RV32M1/
Dfsl_xcvr.c1102 XCVR_TSM->TIMING05 = com_config->tsm_timing_05_init; in XCVR_Configure()
1142 XCVR_TSM->TIMING05 += B1(2); /* (bb_ldo_vcolo_en) */ in XCVR_Configure()
1250 XCVR_TSM->TIMING05 = com_config->tsm_timing_05_init+GFSK_250K_RX_WD_ONLY_ADJUST; in XCVR_Configure()
1319 XCVR_TSM->TIMING05 = com_config->tsm_timing_05_init; in XCVR_Configure()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h29189 __IO uint32_t TIMING05; /**< TSM_TIMING05, offset: 0x44 */ member
DRV32M1_zero_riscy.h28320 __IO uint32_t TIMING05; /**< TSM_TIMING05, offset: 0x44 */ member