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Searched refs:SYS_CTRL (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_usdhc.c737 sysctl = base->SYS_CTRL; in USDHC_Init()
753 base->SYS_CTRL = sysctl; in USDHC_Init()
776 …base->SYS_CTRL |= (mask & (USDHC_SYS_CTRL_RSTA_MASK | USDHC_SYS_CTRL_RSTC_MASK | USDHC_SYS_CTRL_RS… in USDHC_Reset()
778 while ((base->SYS_CTRL & mask) != 0U) in USDHC_Reset()
900 sysctl = base->SYS_CTRL; in USDHC_SetSdClock()
903 base->SYS_CTRL = sysctl; in USDHC_SetSdClock()
915 base->SYS_CTRL |= USDHC_SYS_CTRL_INITA_MASK; in USDHC_SetCardActive()
917 while ((base->SYS_CTRL & USDHC_SYS_CTRL_INITA_MASK) == USDHC_SYS_CTRL_INITA_MASK) in USDHC_SetCardActive()
Dfsl_usdhc.h879 base->SYS_CTRL |= USDHC_SYS_CTRL_IPP_RST_N_MASK; in USDHC_AssertHardwareReset()
883 base->SYS_CTRL &= ~USDHC_SYS_CTRL_IPP_RST_N_MASK; in USDHC_AssertHardwareReset()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h21686 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
DRV32M1_zero_riscy.h22514 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member