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Searched refs:SRAMDSR (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_msmc.h682 base->SRAMDSR &= ~(1U << arrayIdx); /* Clear to be retained in STOP modes. */ in SMC_SRAMEnableDeepSleepMode()
686 base->SRAMDSR |= (1U << arrayIdx); /* Set to be powered off in STOP modes. */ in SMC_SRAMEnableDeepSleepMode()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h18044 __IO uint32_t SRAMDSR; /**< SRAM Deep Sleep Register, offset: 0x64 */ member
DRV32M1_zero_riscy.h18872 __IO uint32_t SRAMDSR; /**< SRAM Deep Sleep Register, offset: 0x64 */ member