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Searched refs:SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_spm.c152 base->DCDCC3 |= SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_MASK; in SPM_BypassDcdcBattMonitor()
156 base->DCDCC3 &= ~SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_MASK; in SPM_BypassDcdcBattMonitor()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h19146 #define SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_MASK (0x1U) macro
19148 …(((uint32_t)(x)) << SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_SHIFT)) & SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_MASK)
DRV32M1_zero_riscy.h19974 #define SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_MASK (0x1U) macro
19976 …(((uint32_t)(x)) << SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_SHIFT)) & SPM_DCDCC3_DCDC_BYPASS_ADC_MEAS_MASK)