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Searched refs:SPM_CORERCNFG_RTCVDDMEN_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_spm.h93 SPM_CORERCNFG_RTCVDDMEN_MASK, /*!< RTC power monitor enabled in run modes. */
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h18752 #define SPM_CORERCNFG_RTCVDDMEN_MASK (0x40000U) macro
18758 … (((uint32_t)(((uint32_t)(x)) << SPM_CORERCNFG_RTCVDDMEN_SHIFT)) & SPM_CORERCNFG_RTCVDDMEN_MASK)
DRV32M1_zero_riscy.h19580 #define SPM_CORERCNFG_RTCVDDMEN_MASK (0x40000U) macro
19586 … (((uint32_t)(((uint32_t)(x)) << SPM_CORERCNFG_RTCVDDMEN_SHIFT)) & SPM_CORERCNFG_RTCVDDMEN_MASK)