Home
last modified time | relevance | path

Searched refs:SMC_SRIE_CORE1_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_msmc.h189 kSMC_IntCore1 = SMC_SRIE_CORE1_MASK, /*! Core 1 interrupts. */
200 SMC_SRIE_CORE1_MASK
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h18489 #define SMC_SRIE_CORE1_MASK (0x20000U) macro
18495 … (((uint32_t)(((uint32_t)(x)) << SMC_SRIE_CORE1_SHIFT)) & SMC_SRIE_CORE1_MASK)
DRV32M1_zero_riscy.h19317 #define SMC_SRIE_CORE1_MASK (0x20000U) macro
19323 … (((uint32_t)(((uint32_t)(x)) << SMC_SRIE_CORE1_SHIFT)) & SMC_SRIE_CORE1_MASK)