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Searched refs:SMC_FM_FORCECFG_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h18573 #define SMC_FM_FORCECFG_MASK (0x3U) macro
18579 … (((uint32_t)(((uint32_t)(x)) << SMC_FM_FORCECFG_SHIFT)) & SMC_FM_FORCECFG_MASK)
DRV32M1_zero_riscy.h19401 #define SMC_FM_FORCECFG_MASK (0x3U) macro
19407 … (((uint32_t)(((uint32_t)(x)) << SMC_FM_FORCECFG_SHIFT)) & SMC_FM_FORCECFG_MASK)