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Searched refs:SMC1_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h18608 #define SMC1_BASE (0x41020000u) macro
18610 #define SMC1 ((SMC_Type *)SMC1_BASE)
18612 #define SMC_BASE_ADDRS { SMC0_BASE, SMC1_BASE }
DRV32M1_zero_riscy.h19436 #define SMC1_BASE (0x41020000u) macro
19438 #define SMC1 ((SMC_Type *)SMC1_BASE)
19440 #define SMC_BASE_ADDRS { SMC0_BASE, SMC1_BASE }