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Searched refs:SIM_SDID_SUBFAMID_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h17853 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
17860 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
DRV32M1_zero_riscy.h18681 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
18688 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)