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Searched refs:SIM_FCFG2_MAXADDR01_SHIFT (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h17927 #define SIM_FCFG2_MAXADDR01_SHIFT (24U) macro
17928 …_MAXADDR01(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR01_SHIFT)) & SIM_…
DRV32M1_zero_riscy.h18755 #define SIM_FCFG2_MAXADDR01_SHIFT (24U) macro
18756 …_MAXADDR01(x) (((uint32_t)(((uint32_t)(x)) << SIM_FCFG2_MAXADDR01_SHIFT)) & SIM_…