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Searched refs:SIM_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h18001 #define SIM_BASE (0x40026000u) macro
18003 #define SIM ((SIM_Type *)SIM_BASE)
18005 #define SIM_BASE_ADDRS { SIM_BASE }
DRV32M1_zero_riscy.h18829 #define SIM_BASE (0x40026000u) macro
18831 #define SIM ((SIM_Type *)SIM_BASE)
18833 #define SIM_BASE_ADDRS { SIM_BASE }