Searched refs:SIM (Results 1 – 6 of 6) sorted by relevance
17 SIM->SOPT1CFG |= (SIM_SOPT1CFG_URWE_MASK | SIM_SOPT1CFG_UVSWE_MASK | SIM_SOPT1CFG_USSWE_MASK); in SIM_SetUsbVoltRegulatorEnableMode()19 SIM->SOPT1 = (SIM->SOPT1 & ~kSIM_UsbVoltRegEnableInAllModes) | mask; in SIM_SetUsbVoltRegulatorEnableMode()26 uid->H = SIM->UIDH; in SIM_GetUniqueId()29 uid->M = SIM->UIDM; in SIM_GetUniqueId()31 uid->MH = SIM->UIDMH; in SIM_GetUniqueId()32 uid->ML = SIM->UIDML; in SIM_GetUniqueId()34 uid->L = SIM->UIDL; in SIM_GetUniqueId()40 info->rfAddrL = SIM->RFADDRL; in SIM_GetRfAddr()41 info->rfAddrH = SIM->RFADDRH; in SIM_GetRfAddr()
109 SIM->FCFG1 = mode; in SIM_SetFlashMode()134 SIM->MISC2 &= ~SIM_MISC2_SYSTICK_CLK_EN_MASK; /* Clear to enable. */ in SIM_EnableSystickClock()138 SIM->MISC2 |= SIM_MISC2_SYSTICK_CLK_EN_MASK; /* Set to disable. */ in SIM_EnableSystickClock()
765 uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_CORE1_PFSIZE_MASK) >> SIM_FCFG1_CORE1_PFSIZE_SHIFT; in FLASH_Init()791 uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_CORE0_PFSIZE_MASK) >> SIM_FCFG1_CORE0_PFSIZE_SHIFT; in FLASH_Init()793 uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_PFSIZE_MASK) >> SIM_FCFG1_PFSIZE_SHIFT; in FLASH_Init()
423 SIM->SCGC5 |= SIM_SCGC5_PHYDIG_MASK; in XCVR_Init()608 SIM->SCGC5 |= mode_config->scgc5_clock_ena_bits; in XCVR_Configure()
18003 #define SIM ((SIM_Type *)SIM_BASE) macro18007 #define SIM_BASE_PTRS { SIM }
18831 #define SIM ((SIM_Type *)SIM_BASE) macro18835 #define SIM_BASE_PTRS { SIM }
