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Searched refs:SCG_SIRCDIV_SIRCDIV1_VAL (Results 1 – 1 of 1) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.c33 #define SCG_SIRCDIV_SIRCDIV1_VAL ((SCG->SIRCDIV & SCG_SIRCDIV_SIRCDIV1_MASK) >> SCG_SIRCDIV_SIRCDIV… macro
512 divider = SCG_SIRCDIV_SIRCDIV1_VAL; in CLOCK_GetSircAsyncFreq()