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Searched refs:SCG_LPFLLDIV_LPFLLDIV3 (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.c684 SCG_LPFLLDIV_LPFLLDIV3(config->div3); in CLOCK_InitLpFll()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h17216 #define SCG_LPFLLDIV_LPFLLDIV3(x) (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLDIV_LPFLL… macro
DRV32M1_zero_riscy.h18044 #define SCG_LPFLLDIV_LPFLLDIV3(x) (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLDIV_LPFLL… macro