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Searched refs:SCG_HCCR_DIVSLOW_SHIFT (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h16557 #define SCG_HCCR_DIVSLOW_SHIFT (0U) macro
16576 …_DIVSLOW(x) (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVSLOW_SHIFT)) & SCG_HC…
DRV32M1_zero_riscy.h17385 #define SCG_HCCR_DIVSLOW_SHIFT (0U) macro
17404 …_DIVSLOW(x) (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVSLOW_SHIFT)) & SCG_HC…