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Searched refs:SCG_FIRCDIV_FIRCDIV1_VAL (Results 1 – 1 of 1) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.c36 #define SCG_FIRCDIV_FIRCDIV1_VAL ((SCG->FIRCDIV & SCG_FIRCDIV_FIRCDIV1_MASK) >> SCG_FIRCDIV_FIRCDIV… macro
637 divider = SCG_FIRCDIV_FIRCDIV1_VAL; in CLOCK_GetFircAsyncFreq()