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Searched refs:SCG_CSR_DIVEXT (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h16315 #define SCG_CSR_DIVEXT(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVEXT_SHI… macro
DRV32M1_zero_riscy.h17143 #define SCG_CSR_DIVEXT(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVEXT_SHI… macro