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Searched refs:SC (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_tpm.c76 base->SC = TPM_SC_PS(config->prescale); in TPM_Init()
102 base->SC &= ~TPM_SC_CMOD_MASK; in TPM_Deinit()
157 uint32_t tpmClock = (srcClock_Hz / (1U << (base->SC & TPM_SC_PS_MASK))); in TPM_SetupPwm()
176 base->SC &= ~TPM_SC_CPWMS_MASK; in TPM_SetupPwm()
180 base->SC |= TPM_SC_CPWMS_MASK; in TPM_SetupPwm()
681 base->SC |= TPM_SC_TOIE_MASK; in TPM_EnableInterrupts()
704 base->SC &= ~TPM_SC_TOIE_MASK; in TPM_DisableInterrupts()
728 if (base->SC & TPM_SC_TOIE_MASK) in TPM_GetEnabledInterrupts()
Dfsl_tpm.h559 uint32_t reg = base->SC; in TPM_StartTimer()
563 base->SC = reg; in TPM_StartTimer()
574 base->SC &= ~(TPM_SC_CMOD_MASK); in TPM_StopTimer()
577 while (base->SC & TPM_SC_CMOD_MASK) in TPM_StopTimer()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h19261 __IO uint32_t SC; /**< Status and Control, offset: 0x10 */ member
22939 …__IO uint8_t SC; /**< VREF Status and Control Register, offset: 0x… member
DRV32M1_zero_riscy.h20089 __IO uint32_t SC; /**< Status and Control, offset: 0x10 */ member
23767 …__IO uint8_t SC; /**< VREF Status and Control Register, offset: 0x… member