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Searched refs:SBLIM (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_trng.c1018 #define TRNG_SBLIM_REG(base) ((base)->SBLIM)
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h19909 __IO uint32_t SBLIM; /**< Sparse Bit Limit Register, offset: 0x14 */ member
DRV32M1_zero_riscy.h20737 __IO uint32_t SBLIM; /**< Sparse Bit Limit Register, offset: 0x14 */ member