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Searched refs:RTC_WAR_TSRW_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h15936 #define RTC_WAR_TSRW_MASK (0x1U) macro
15942 … (((uint32_t)(((uint32_t)(x)) << RTC_WAR_TSRW_SHIFT)) & RTC_WAR_TSRW_MASK)
DRV32M1_zero_riscy.h16764 #define RTC_WAR_TSRW_MASK (0x1U) macro
16770 … (((uint32_t)(((uint32_t)(x)) << RTC_WAR_TSRW_SHIFT)) & RTC_WAR_TSRW_MASK)