Home
last modified time | relevance | path

Searched refs:RTC_WAR_MERW_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h15999 #define RTC_WAR_MERW_MASK (0x200U) macro
16005 … (((uint32_t)(((uint32_t)(x)) << RTC_WAR_MERW_SHIFT)) & RTC_WAR_MERW_MASK)
DRV32M1_zero_riscy.h16827 #define RTC_WAR_MERW_MASK (0x200U) macro
16833 … (((uint32_t)(((uint32_t)(x)) << RTC_WAR_MERW_SHIFT)) & RTC_WAR_MERW_MASK)