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Searched refs:RTC_TIR_FSIE_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_rtc.c347 tmp32 |= RTC_TIR_FSIE_MASK; in RTC_EnableInterrupts()
410 tmp32 |= RTC_TIR_FSIE_MASK; in RTC_DisableInterrupts()
468 if (RTC_TIR_FSIE_MASK == (RTC_TIR_FSIE_MASK & base->TIR)) in RTC_GetEnabledInterrupts()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h15873 #define RTC_TIR_FSIE_MASK (0x40U) macro
15879 … (((uint32_t)(((uint32_t)(x)) << RTC_TIR_FSIE_SHIFT)) & RTC_TIR_FSIE_MASK)
DRV32M1_zero_riscy.h16701 #define RTC_TIR_FSIE_MASK (0x40U) macro
16707 … (((uint32_t)(((uint32_t)(x)) << RTC_TIR_FSIE_SHIFT)) & RTC_TIR_FSIE_MASK)