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Searched refs:RTC_CR_OSCE_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_rtc.h329 base->CR |= RTC_CR_OSCE_MASK; in RTC_SetClockSource()
Dfsl_clock.h955 RTC->CR |= RTC_CR_OSCE_MASK; in CLOCK_EnableRtcOsc()
959 RTC->CR &= ~RTC_CR_OSCE_MASK; in CLOCK_EnableRtcOsc()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h15539 #define RTC_CR_OSCE_MASK (0x100U) macro
15545 …) (((uint32_t)(((uint32_t)(x)) << RTC_CR_OSCE_SHIFT)) & RTC_CR_OSCE_MASK)
DRV32M1_zero_riscy.h16367 #define RTC_CR_OSCE_MASK (0x100U) macro
16373 …) (((uint32_t)(((uint32_t)(x)) << RTC_CR_OSCE_SHIFT)) & RTC_CR_OSCE_MASK)