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Searched refs:RSTGT_R (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_sema42.c123 if (base->RSTGT_R & SEMA42_RSTGT_R_RSTGSM_MASK) in SEMA42_ResetGate()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h17314 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
DRV32M1_zero_riscy.h18142 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member