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Searched refs:RSIM_SW_CONFIG_RADIO0_INTERRUPT_EN_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h15064 #define RSIM_SW_CONFIG_RADIO0_INTERRUPT_EN_MASK (0x1000000U) macro
15066 …t32_t)(x)) << RSIM_SW_CONFIG_RADIO0_INTERRUPT_EN_SHIFT)) & RSIM_SW_CONFIG_RADIO0_INTERRUPT_EN_MASK)
DRV32M1_zero_riscy.h15892 #define RSIM_SW_CONFIG_RADIO0_INTERRUPT_EN_MASK (0x1000000U) macro
15894 …t32_t)(x)) << RSIM_SW_CONFIG_RADIO0_INTERRUPT_EN_SHIFT)) & RSIM_SW_CONFIG_RADIO0_INTERRUPT_EN_MASK)