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Searched refs:RSIM_CONTROL_RSIM_CGC_XCVR_EN (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14920 #define RSIM_CONTROL_RSIM_CGC_XCVR_EN(x) (((uint32_t)(((uint32_t)(x)) << RSIM_CONTROL_RSIM_… macro
DRV32M1_zero_riscy.h15748 #define RSIM_CONTROL_RSIM_CGC_XCVR_EN(x) (((uint32_t)(((uint32_t)(x)) << RSIM_CONTROL_RSIM_… macro