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Searched refs:PORT_GICLR_GIWD_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14725 #define PORT_GICLR_GIWD_MASK (0xFFFF0000U) macro
14727 … (((uint32_t)(((uint32_t)(x)) << PORT_GICLR_GIWD_SHIFT)) & PORT_GICLR_GIWD_MASK)
DRV32M1_zero_riscy.h15407 #define PORT_GICLR_GIWD_MASK (0xFFFF0000U) macro
15409 … (((uint32_t)(((uint32_t)(x)) << PORT_GICLR_GIWD_SHIFT)) & PORT_GICLR_GIWD_MASK)