Home
last modified time | relevance | path

Searched refs:PE1 (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_llwu.c22 regBase = &base->PE1; in LLWU_SetExternalWakeupPinMode()
40 regBase = &base->PE1; in LLWU_SetExternalWakeupPinMode()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h8266 __IO uint32_t PE1; /**< Pin Enable 1 register, offset: 0x8 */ member
DRV32M1_zero_riscy.h8410 __IO uint32_t PE1; /**< Pin Enable 1 register, offset: 0x8 */ member