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Searched refs:PCC_CLKCFG_CGC_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.h781 (*(volatile uint32_t *)name) |= PCC_CLKCFG_CGC_MASK; in CLOCK_EnableClock()
793 (*(volatile uint32_t *)name) &= ~PCC_CLKCFG_CGC_MASK; in CLOCK_DisableClock()
833 (*(volatile uint32_t *)name) = reg & ~PCC_CLKCFG_CGC_MASK; in CLOCK_SetIpSrc()
865 (*(volatile uint32_t *)name) = reg & ~PCC_CLKCFG_CGC_MASK; in CLOCK_SetIpSrcDiv()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14406 #define PCC_CLKCFG_CGC_MASK (0x40000000U) macro
14412 … (((uint32_t)(((uint32_t)(x)) << PCC_CLKCFG_CGC_SHIFT)) & PCC_CLKCFG_CGC_MASK)
DRV32M1_zero_riscy.h15088 #define PCC_CLKCFG_CGC_MASK (0x40000000U) macro
15094 … (((uint32_t)(((uint32_t)(x)) << PCC_CLKCFG_CGC_SHIFT)) & PCC_CLKCFG_CGC_MASK)