Searched refs:MU_SR_GIPn_MASK (Results 1 – 3 of 3) sorted by relevance
321 …return (base->SR & (MU_SR_TEn_MASK | MU_SR_RFn_MASK | MU_SR_GIPn_MASK | MU_SR_EP_MASK | MU_SR_FUP_… in MU_GetStatusFlags()366 uint32_t regMask = MU_SR_GIPn_MASK; in MU_ClearStatusFlags()
14187 #define MU_SR_GIPn_MASK (0xF0000000U) macro14193 …x) (((uint32_t)(((uint32_t)(x)) << MU_SR_GIPn_SHIFT)) & MU_SR_GIPn_MASK)
14869 #define MU_SR_GIPn_MASK (0xF0000000U) macro14875 …x) (((uint32_t)(((uint32_t)(x)) << MU_SR_GIPn_SHIFT)) & MU_SR_GIPn_MASK)
