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Searched refs:MU_CCR_HRM_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_mu.h564 base->CCR |= MU_CCR_HRM_MASK; in MU_MaskHardwareReset()
568 base->CCR &= ~MU_CCR_HRM_MASK; in MU_MaskHardwareReset()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14286 #define MU_CCR_HRM_MASK (0x2U) macro
14292 …x) (((uint32_t)(((uint32_t)(x)) << MU_CCR_HRM_SHIFT)) & MU_CCR_HRM_MASK)
DRV32M1_zero_riscy.h14968 #define MU_CCR_HRM_MASK (0x2U) macro
14974 …x) (((uint32_t)(((uint32_t)(x)) << MU_CCR_HRM_SHIFT)) & MU_CCR_HRM_MASK)