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Searched refs:MU_CCR_CLKE_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_mu.h629 base->CCR |= MU_CCR_CLKE_MASK; in MU_SetClockOnOtherCoreEnable()
633 base->CCR &= ~MU_CCR_CLKE_MASK; in MU_SetClockOnOtherCoreEnable()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14300 #define MU_CCR_CLKE_MASK (0x8U) macro
14306 …) (((uint32_t)(((uint32_t)(x)) << MU_CCR_CLKE_SHIFT)) & MU_CCR_CLKE_MASK)
DRV32M1_zero_riscy.h14982 #define MU_CCR_CLKE_MASK (0x8U) macro
14988 …) (((uint32_t)(((uint32_t)(x)) << MU_CCR_CLKE_SHIFT)) & MU_CCR_CLKE_MASK)